PP

Preetha Parthasarathy

Corp Dev at SAP

San Francisco Bay Area

Invests in

Stages:

  • Min Investment:

    $5,000.00
  • Max Investment:

    $50,000.00
  • Target Investment:

    $25,000.00

Work Experience

2018

  • Investments, Corporate Development

    2021

    Funding insights, POV/thesis and investments + AI Foundational model/LLM investments + Bolt Series D

  • Partner, SAP.iO fund

    2018 - 2020

    Funding insights, POV/thesis and investments + Jina AI Seed+ + Hasura Series A + Crosschq Seed+ + Deepgram Series A + Cloud App Seed+ + Disco Seed (acquired by Culture Amp) + Zippin Seed+

2016 - 2018

  • Investment Director at Intel Capital

    2016 - 2018

    Lead for AI/deep learning investments at the edge(Movidius) + Xnor.ai partnership (acq. by Apple) + Traceup Series A + Partnered on Aeye Series A

2014 - 2016

  • Sr. Manager, Sandisk Ventures & Corporate Development

    2014 - 2016

    Source and lead new investments Connected home strategy/partnerships M&A - Deal lead - Carve-out and spin off of NexGen inc from SanDisk Deal team - Western Digital's $19B acquisition of SanDisk

2010 - 2014

  • Sr. Corporate Strategy Manager

    2013 - 2014

    Strategic alliances with ecosystem partners Business/investment analysis for new growth opportunities

  • Sr. Manager, AMD Ventures

    2012 - 2013

    * Led investments in - + Aviary - Series B+ (acquired by Adobe) +Tango - Series C+ * Manage AMD's investment portfolio.(BlueStacks, Aviary, InContext, Ciinow, EyeSight)

  • Chief of Staff to CMO

    2011 - 2011

  • Manager Corporate Development

    2010 - 2011

2009 - 2009

  • Product Manager

    2009 - 2009

    * Conducted market research to determine market requirements for the next generation of low power platforms and presented it to the client business unit leads. This was used as a key input in product planning.

2005 - 2008

  • Design Unit Lead

    2007 - 2008

    * Managed all aspects of the instruction decoder unit for a next generation low power microprocessor (Saltwell microarchitecture) and documented the high level architectural specification changes, which served as a design reference for other teams on the project. * Analyzed new performance features for the microprocessor and successfully designed and implemented them. * Chaired the Women at Intel organization at the Austin site.

  • Sr. Logic Design Engineer

    2005 - 2007

    * Led a taskforce to come up with design guidelines which were adopted by all teams on the project. This resulted in design consistency across the entire chip. * Designed, managed and delivered 7 design blocks on the Intel Atom microprocessor(Bonnell microarchitecture). Atom generated $1.4B in revenue for Intel in 2009 through sale of microprocessors and associated chipsets. * Analyzed design errors across all teams after project completion and compiled errata for future microprocessor product releases.